Si5338 driver

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The drivers/misc/si5338.c driver allows real-time control of the Silicon Labs si5338 Clock Generator using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python script to a Device Tree fragment (or fed to the driver using sysfs interface).

Contents

Reference Documentation

This driver is developed using very good and detailed documentation provided by the chip manufacturer: Si5338-RM.pdf - detailed description of the device registers Si5338.pdf - overall chip documentation including configuration procedure This documentation is strongly recommended to use when interfacing si5338.c driver.

Sample configuration of the si5338 using shell commands/script

SI5338="/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070" # device sysfs root directory in elphel393 camera
echo "0" > $SI5338/pre_init_clear # prepare for configuration, clear all input/output routing
echo "25000000" > $SI5338/input/in_frequency3 # set input clock 25.0 MHz applied to a single-ended input "IN3"
echo "150000000" >$SI5338/pll/pll_by_out_int # find integer dividers to set PLL for generation of the 150MHz with low jitter, setup PLL analog parameters
echo "150000000" >$SI5338/output_clocks/out3_freq_int # route output3 to the MultiSynth divider MS3, set the MS3 and output divider
echo "15000000" >$SI5338/output_clocks/out2_freq_fract # set 15MHz output frequency for channel 0, enable fractional divider
echo "in3/2/32" >$SI5338/output_drivers/out2_route # route output2 to the in3 input, bypassing PLL, use divider by 2 in the input stage and divider by 32 in the output stage
echo "1 2" > $SI5338/output_drivers/2V5_LVPECL # set outputs 1 and 2 to 2.5V LVPECL differential standard
echo "3" > $SI5338/output_drivers/1V8_LVDS # set output 3 to 1.8V LVDS differential standard
echo "0" > $SI5338/output_drivers/1V5_HSTL_A+ # set output 3 to 1.5V HSTL single-ended standard, no inversion on "A" out, disabled "B" output
echo "0 1 2 3" > $SI5338/output_drivers/dis_hi-z # set all outputs to be in hi-Z state when disabled
echo "1 50 31500"> $SI5338/spread_spectrum/ss3_values /* Set spread spectrum for channel3 : enabled, 0.5%, 31.5KHz */
echo "1 500 31500"> $SI5338/spread_spectrum/ss0_values /* Set maximal spread spectrum for channel0 : enabled, 5%, 31.5KHz */
echo "0" > $SI5338/post_init # configure and calibrate PLL, initialize device.

As long as the PLL frequency is not changed it is now possible to modify other parameters (output routes, output frequencies, spread spectrum) "on the fly" without re-initialization of the device. If programming was performed by loading complete register map and later modifications are required, input frequency and spread spectrum parameters need to be specified - they are stored in the driver variables, not in the device registers.

Sample configuration of the si5338 using Device Tree

si5338@70 {
	compatible = "sil,si5338";
	reg = <0x70>;
	si5338,init="always"; /* initialize PLL, wait for lock. Other option is 'if off' */
	/* low-level masked register writes, may be used to load frequency plan */
	/*si5338,configuration_data=< 0x1ffcf0 >;*/ /* just for testing: write data 0xfc with write enable mask 0xf0 to register 0x01f */
	si5338,in_frequency3= < 25000000>; /* 25MHz on input 3 (other inputs are '12",'4','56' and '12xo' */
	/* PLL may be set either directly (pll_freq_fract,pll_freq_int) or to match some output (pll_by_out_fract, pll_by_out_int)
	 * _int suffix forces to find integer divisors, _fract - allows fractional ones */
	si5338,pll_by_out_int=<150000000>;  /* 150Mhz May have 3 values: integer, nominator and denominator */
	si5338,out3_freq_int= <150000000>;  /* 150Mhz. May have 3 values: integer, nominator and denominator */
	si5338,out2_select= "in3/2/32";  /* connect out2 to IN3, divided by 2 (input stage) and then by 32 (output stage)*/
	si5338,2V5_LVPECL=  <1 2>; /* set output standard for channels 1 and 2 */
	si5338,1V5_HSTL_A+= <0>;   /* set output standard for channel 0, only A output is used (noninverted) */
	si5338,1V8_LVDS=    <3>;
	/* Disabled state for outputs:  */
	si5338,dis_hi-z=    <0 1 2 3>; /* Disabled state for listed outputs, also possible: "dis_hi-z","dis_low","dis_high","dis_always_on" */
	si5338,output_en=   < 3>; /* Which outputs should be initially enabled */
	si5338,spread_spectrum_3= <1 50 31500>; /* Set spread spectrum for channel3 : enabled, 0.5%, 31.5KHz */
	si5338,out0_freq_int= <15000000>;  /* 15Mhz to output 0 */
	si5338,spread_spectrum_0= <1 500 31500>; /* Set spread spectrum for channel0 : enabled, 5%, 31.5KHz - high value, for testing */
};

sysfs interface

top level files

outputs (read only)

Provides information about each of the 4 outputs, like in the example below:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz

This includes:

status (read only)

Read and interpret status register.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE

pre_init (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init

Disables all outputs, loss of lock signal before setting parameters and initializing PLL

pre_init_clear (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear

Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones

post_init (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init

Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.

input/ folder

input/in_frequency12

input/in_frequency12xo

input/in_frequency3

input/in_frequency4

input/in_frequency56

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000

Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.

input/in_mux

input/ref_mux

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1

Directly control in input and feedback multiplexers

input/in_mux_txt (read only)

input/ref_mux_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt 
IN3(single ended)

Interpret the state of the input and feedback multiplexers

input/in_p1_div

input/in_p2_div

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32

Read/write input dividers, valid values are 1,2,4,8,16 and 32

input/in_pfd_ref

input/in_pfd_fb

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0

Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".

input/in_pfd_ref_txt (read only)

input/in_pfd_fb_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)

Read and interpret the state of the reference and feedback multiplexers.

input/fb_external

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0

Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.

input/xtal_freq_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz

Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.

input/pll_ref_frequency (read only)

input/pll_fb_frequency (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0

Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.

pll/ folder

VCO frequency (use in PLL) can be set up either directly, or to match specified output frequency (one of the 4 channels). The valid range is 2.2GHz to 2.84GHz (2200000000 to 2840000000). Frequencies are specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.

pll/pll_freq_int

Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.

pll/pll_freq_fract

Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.

pll/pll_by_out_int

Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.

pll/pll_by_out_fract

Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1

multiSynth/ folder

The si5338 chip uses 5 "multiSynth" fractional dividers - 4 of them (MS0..MS3) are used for the output frequencies generations, and the fifth one (MSn) is used as the PLL feeback divider. This subdirectory allows low-level control of these dividers - in most cases they can be set up indirectly by specifying the required frequencies.

multiSynth/ms0_p123

multiSynth/ms1_p123

multiSynth/ms2_p123

multiSynth/ms3_p123

multiSynth/msn_p123

Read/write a set of 3 registers as defined in the Reference Manual (P1, P2 and P3):

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "21248 0 1" multiSynth/ms0_p123
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_p123
21248 0 1

multiSynth/ms0_abc

multiSynth/ms1_abc

multiSynth/ms2_abc

multiSynth/ms3_abc

multiSynth/msn_abc

Read/write MultiSynth dividers using integer part, numerator and denominator (a,b and c) as referenced in the manual

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_abc
170 0 1

multiSynth/ms0_freq_int

multiSynth/ms0_freq_fract

multiSynth/ms1_freq_int

multiSynth/ms1_freq_fract

multiSynth/ms2_freq_int

multiSynth/ms2_freq_fract

multiSynth/ms3_freq_int

multiSynth/ms3_freq_fract

Setting integer/fractional MultiSynth dividers by the required output frequency (single integer or 3 numbers - integer, numerator and denominator). Reading back provides actual value of the frequency.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_freq_int
15000000 0 1

multiSynth/ms_power_up

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0 3" > multiSynth/ms_power_up
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_up
0 3

Power up selected channels, read returns the list of the powered up channels

multiSynth/ms_power_down

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > multiSynth/ms_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_down
1 2

Power down selected channels, read returns the list of the powered down channels

multiSynth/ms_reset

Reset multiSynth dividers (not clear when exactly they should be reset - possibly after spread spectrum changes).

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > multiSynth/ms_reset

output_clocks/ folder

output_clocks/out0_div

output_clocks/out1_div

output_clocks/out2_div

output_clocks/out3_div

Direct setting of the output divider, that can be 1,2,4,8,16 and 32. In most applications this divider is automatically set by specifying the output frequency.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "8" > output_clocks/out0_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_div
8

output_clocks/out0_div_by_freq (write only)

output_clocks/out1_div_by_freq (write only)

output_clocks/out2_div_by_freq (write only)

output_clocks/out3_div_by_freq (write only)

Set just the divider to match the required frequency. Frequency is specified in Hz.

output_clocks/out0_source

output_clocks/out1_source

output_clocks/out2_source

output_clocks/out3_source

Set/read the output multiplexer selection (as a number).

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "6" > output_clocks/out0_source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source
6

output_clocks/out0_source_txt (read only)

output_clocks/out1_source_txt (read only)

output_clocks/out2_source_txt (read only)

output_clocks/out3_source_txt (read only)

Read and interpret the output multiplexer selection.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_txt
MS0

output_clocks/out0_source_freq (read only)

output_clocks/out1_source_freq (read only)

output_clocks/out2_source_freq (read only)

output_clocks/out3_source_freq (read only)

Get the frequency on the input of the output divider.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_freq 
15000000 0 1

output_clocks/out0_route

output_clocks/out1_route

output_clocks/out2_route

output_clocks/out3_route

Read/write the full route of the output clock, including the divider. Here are some examples:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "IN3:2:8" >output_clocks/out1_route

Route clock from input 3 through input divider 2 and output divider 8

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
No clock

Output 2 is not connected to any source

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_route
MS0:1

Output 0 is connected to MultiSynth divider channel 0, output divider 1:1

output_clocks/out0_freq_int

output_clocks/out0_freq_fract

output_clocks/out1_freq_int

output_clocks/out1_freq_fract

output_clocks/out2_freq_int

output_clocks/out2_freq_fract

output_clocks/out3_freq_int

output_clocks/out3_freq_fract

Most common way to specify output frequency and route. Output is routed to the same channel MultiSynth divider, MS divider and output divider are set to match the specified frequency. "_int" suffix rounds the MS divider to the nearest integer, "_fract" allows fractional dividers. Output frequency specified in Hz as a single number or a triad of integer, numerator and denominator. When read returns the actual frequency of the output

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "150000 1 2" > output_clocks/out2_freq_fract
sh: write error: Invalid argument

Specified frequency (150KHz) is too low even with the 1:32 output divider

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_fract
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_freq_fract
200000 6250 12207
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_int
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_freq_int
200219 169 199
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_route
MS2:32
Output frequency for the channel 2 is set to the 200000.5 Hz first with fractional MS2 divider (resulting in 200000.512Hz), then with integer divider - 200219.8 Hz

spread_spectrum/ folder

Driver only supports down spread implemented in all chip revisions (si5338B does not have center spread), so the nominal frequency should be set half-amplitude higher than the the center frequency.

spread_spectrum/ss0_regs_hex

spread_spectrum/ss1_regs_hex

spread_spectrum/ss2_regs_hex

spread_spectrum/ss3_regs_hex

Spread spectrum parameters for the specified MultiSynth channel as a set of the 7 values as specified in the Reference Manual :

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_regs_hex 
updown_par=0x77 down_pars=0x0 0x20 0xcfd up_pars= 0x100 0x1 0x0

when set up, provide the list in the same sequence (may have less than 7, then only specified values will be updated): up/down parameter, down parameter 1, down parameter 2, down parameter 3, up parameter 1, up parameter 2, up parameter 3.

spread_spectrum/ss0_values

spread_spectrum/ss1_values

spread_spectrum/ss2_values

spread_spectrum/ss3_values

Per-channel spread spectrum values: On/Off state, spread amplitude as integer in the range of 10..500 (corresponding to 0.1% to 5% in 0.01% steps) and sweep rate in Hz (from 31500 to 63000)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 500 31500" > spread_spectrum/ss0_values
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_values
Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz

spread_spectrum/ss_change_freq_mode

Spread spectrum registers need to be re-calculated after base frequency change, this parameter specifies what to do when the MultiSynth divider is modified.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
0 - turn spread spectrum off on frequency change
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
1 - recalculate spread spectrum on frequency change, do not reset MS
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
2 - turn spread spectrum off on frequency change, reset MS when SS is turned on
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "3" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
3 - recalculate spread spectrum on frequency change, do not reset MS

spread_spectrum/ms_reset (write only)

Force MultiSynth reset (not sure if it is needed and when)

output_drivers/ folder

Configuring output drivers - voltage, I/O standard, inversion, power up/down, output enable and state when the output is disabled

output_drivers/1V5_HSTL_A+

output_drivers/1V5_HSTL_A+B+

output_drivers/1V5_HSTL_A+B-

output_drivers/1V5_HSTL_A-

output_drivers/1V5_HSTL_A-B+

output_drivers/1V5_HSTL_A-B-

output_drivers/1V5_HSTL_B+

output_drivers/1V5_HSTL_B-

output_drivers/1V8_CMOS_A+

output_drivers/1V8_CMOS_A+B+

output_drivers/1V8_CMOS_A+B-

output_drivers/1V8_CMOS_A-

output_drivers/1V8_CMOS_A-B+

output_drivers/1V8_CMOS_A-B-

output_drivers/1V8_CMOS_B+

output_drivers/1V8_CMOS_B-

output_drivers/1V8_LVDS

output_drivers/1V8_SSTL_A+

output_drivers/1V8_SSTL_A+B+

output_drivers/1V8_SSTL_A+B-

output_drivers/1V8_SSTL_A-

output_drivers/1V8_SSTL_A-B+

output_drivers/1V8_SSTL_A-B-

output_drivers/1V8_SSTL_B+

output_drivers/1V8_SSTL_B-

output_drivers/2V5_CMOS_A+

output_drivers/2V5_CMOS_A+B+

output_drivers/2V5_CMOS_A+B-

output_drivers/2V5_CMOS_A-

output_drivers/2V5_CMOS_A-B+

output_drivers/2V5_CMOS_A-B-

output_drivers/2V5_CMOS_B+

output_drivers/2V5_CMOS_B-

output_drivers/2V5_LVDS

output_drivers/2V5_LVPECL

output_drivers/2V5_SSTL_A+

output_drivers/2V5_SSTL_A+B+

output_drivers/2V5_SSTL_A+B-

output_drivers/2V5_SSTL_A-

output_drivers/2V5_SSTL_A-B+

output_drivers/2V5_SSTL_A-B-

output_drivers/2V5_SSTL_B+

output_drivers/2V5_SSTL_B-

output_drivers/3V3_CMOS_A+

output_drivers/3V3_CMOS_A+B+

output_drivers/3V3_CMOS_A+B-

output_drivers/3V3_CMOS_A-

output_drivers/3V3_CMOS_A-B+

output_drivers/3V3_CMOS_A-B-

output_drivers/3V3_CMOS_B+

output_drivers/3V3_CMOS_B-

output_drivers/3V3_LVDS

output_drivers/3V3_LVPECL

output_drivers/3V3_SSTL_A+

output_drivers/3V3_SSTL_A+B+

output_drivers/3V3_SSTL_A+B-

output_drivers/3V3_SSTL_A-

output_drivers/3V3_SSTL_A-B+

output_drivers/3V3_SSTL_A-B-

output_drivers/3V3_SSTL_B+

output_drivers/3V3_SSTL_B-

Set voltage, standard and inversion of the paired outputs (A,B) where applicable by writing list of channels to one of the nodes. When read, node returns the list of outputs that have the specified parameters:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > output_drivers/2V5_SSTL_A+B+
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/2V5_SSTL_A+B+
1 2

To find out the standard of the particular output (or all of them) it is possible to read output_drivers/output<n> or just "outputs". Not all of the combinations of the low-level register values correspond to one of the valid output driver configuration listed above, these combinations will be listed as "Invalid output configuration" and provide the values of the relevant register fields, described in the Reference Manual.

output_drivers/dis_always_on

output_drivers/dis_hi-z

output_drivers/dis_high

output_drivers/dis_low

Setting (and reading back) the behavior of the outputs in the disabled state. Note output state is synchronous and requires clock to run, so if output is already in disable state, switching form "dis_low" to "dis_high" will not take effect. Switching "dis_low" -> "dis_always_on" -> "dis_high" works, as "dis_always_on" temporarily provides output clock.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z 
 0 1 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" >output_drivers/dis_low
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z 
 0 3

output_drivers/output_dis

output_drivers/output_en

Enables/disables specified channels, reads back the list of enabled/disabled ones

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_en
 0 1 2 3

output_drivers/output_power_up

output_drivers/output_power_down

Turns on/off power to the output driver and divider, reads back the list of powered up/down output channels

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
 0 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2 3" > output_drivers/output_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
 0

output_drivers/output0 (read only)

output_drivers/output1 (read only)

output_drivers/output2 (read only)

output_drivers/output3 (read only)

output_drivers/outputs (read only)

List settings related to individual output channel or all of them (the last node is duplicated on the top hierarchy level):

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output0
1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_SSTL_A+B+, output frequency: 1562500 Hz, output route: IN3:2:8, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_SSTL_A+B+, output frequency: 200219-169/199 Hz, output route: MS2:32, ms_power_up, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz

raw/ folder

Nodes in this directory provide low-level access to the chip registers, allow loading of the complete register map generated by the Silicon Labs ClockBuilder software as well as to generate the loadable register map from the current state of the chip.

raw/address

raw/hex_address

Address of the register to read/write data form, this is a full 9-bit register of the si5338 (not the 8-bit i2c register address), the page switching is handled by the driver.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "218" > raw/address
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/address
218
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/hex_address
0x0da

raw/data

raw/hex_data

Read/write register pointed by address

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/data
8
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/hex_data
0x08

raw/hex_all (read only)

Dump all si5338 registers:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/hex_all
000: 01 08 26 10 00 00 00 1d 40 f2 0e c7 00 10 00 00
010: 00 00 00 00 00 00 00 00 00 00 00 70 0b 08 a0 c0
020: e3 e3 c0 97 01 04 04 06 1f 42 24 00 00 c5 01 14
030: 38 80 c4 07 14 00 53 00 00 00 00 01 00 00 00 10
040: 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00 00
050: 00 00 00 00 00 14 80 06 00 00 00 00 01 00 00 00
060: 10 00 31 00 00 00 00 01 00 00 80 00 00 00 00 00
070: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00
080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
090: 00 00 d7 00 00 00 00 00 00 00 00 00 00 00 00 00
0a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0d0: 00 00 00 00 00 00 00 00 00 00 08 00 00 0d 00 00
0e0: f4 f0 00 00 00 12 00 00 00 00 00 c5 01 00 14 00
0f0: 40 65 00 f0 00 00 00 1d 00 a8 00 80 00 00 00 00
100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
110: 00 01 00 00 90 31 00 00 01 00 00 00 00 00 00 01
120: 00 00 00 00 70 07 6c 00 85 00 04 00 00 00 00 00
130: 00 01 00 00 90 31 00 00 01 00 00 00 00 00 00 00
140: 00 01 00 00 90 31 00 00 01 00 00 00 00 00 00 01
150: 00 00 00 00 60 4a 20 00 35 1b 00 00

raw/hex_adwe

Setting up a single or multiple registers with mask. Each item 0xAAADDMM is a hex number (with optional "0x" prefix), combining register 9 bit address AAA (shifted left by 16 bits), 8-bit register data DD (shifted left by 8 bits) and 8-bit write enable mask MM where "1" enables modification, "0" - keeps the old value. , can be used to load full register map generated by external software:

echo "0x6081d 0x1b7080 0x1c0bff 0x1d08ff 0x1eb0ff 0x1fe3ff 0x20e3ff 0x21e3ff \
0x22c0ff 0x2380ff 0x24001f 0x25001f 0x26001f 0x27061f 0x2863ff 0x290c7f \
0x2a243f 0x2d00ff 0x2e00ff 0x2f143f 0x302fff 0x3110ff 0x32c5ff 0x3307ff \
0x3410ff 0x3580ff 0x36feff 0x3703ff 0x3800ff 0x3900ff 0x3a00ff 0x3b01ff \
0x3c00ff 0x3d00ff 0x3e003f 0x3f10ff 0x4080ff 0x41feff 0x4203ff 0x4300ff \
0x4400ff 0x4500ff 0x4601ff 0x4700ff 0x4800ff 0x49003f 0x4a10ff 0x4b80ff \
0x4cfeff 0x4d03ff 0x4e00ff 0x4f00ff 0x5000ff 0x5101ff 0x5200ff 0x5300ff \
0x54003f 0x5510ff 0x5600ff 0x5706ff 0x5800ff 0x5900ff 0x5a00ff 0x5b00ff \
0x5c01ff 0x5d00ff 0x5e00ff 0x5f003f 0x6100ff 0x622eff 0x6300ff 0x6400ff \
0x6500ff 0x6600ff 0x6701ff 0x6800ff 0x6900ff 0x6a80bf 0x6b00ff 0x6c00ff \
0x6d00ff 0x6e40ff 0x6f00ff 0x7000ff 0x7100ff 0x7240ff 0x7300ff 0x7480ff \
0x7500ff 0x7640ff 0x7700ff 0x7800ff 0x7900ff 0x7a40ff 0x7b00ff 0x7c00ff \
0x7d00ff 0x7e00ff 0x7f00ff 0x8000ff 0x81000f 0x82000f 0x8300ff 0x8400ff \
0x8500ff 0x8600ff 0x8700ff 0x8800ff 0x8900ff 0x8a00ff 0x8b00ff 0x8c00ff \
0x8d00ff 0x8e00ff 0x8f00ff 0x9000ff 0x9800ff 0x9900ff 0x9a00ff 0x9b00ff \
0x9c00ff 0x9d00ff 0x9e000f 0x9f000f 0xa000ff 0xa100ff 0xa200ff 0xa300ff \
0xa400ff 0xa500ff 0xa600ff 0xa700ff 0xa800ff 0xa900ff 0xaa00ff 0xab00ff \
0xac00ff 0xad00ff 0xae00ff 0xaf00ff 0xb000ff 0xb100ff 0xb200ff 0xb300ff \
0xb400ff 0xb5000f 0xb600ff 0xb700ff 0xb800ff 0xb900ff 0xba00ff 0xbb00ff \
0xbc00ff 0xbd00ff 0xbe00ff 0xbf00ff 0xc000ff 0xc100ff 0xc200ff 0xc300ff \
0xc400ff 0xc500ff 0xc600ff 0xc700ff 0xc800ff 0xc900ff 0xca00ff 0xcb000f \
0xcc00ff 0xcd00ff 0xce00ff 0xcf00ff 0xd000ff 0xd100ff 0xd200ff 0xd300ff \
0xd400ff 0xd500ff 0xd600ff 0xd700ff 0xd800ff 0xd900ff 0xf20002 0x11f00ff \
0x12000ff 0x12101ff 0x12200ff 0x12300ff 0x12490ff 0x12531ff 0x12600ff 0x12700ff \
0x12801ff 0x12900ff 0x12a00ff 0x12b000f 0x12f00ff 0x13000ff 0x13101ff 0x13200ff \
0x13300ff 0x13490ff 0x13531ff 0x13600ff 0x13700ff 0x13801ff 0x13900ff 0x13a00ff \
0x13b000f 0x13f00ff 0x14000ff 0x14101ff 0x14200ff 0x14300ff 0x14490ff 0x14531ff \
0x14600ff 0x14700ff 0x14801ff 0x14900ff 0x14a00ff 0x14b000f 0x14f00ff 0x15000ff \
0x15100ff 0x15200ff 0x15300ff 0x15490ff 0x15531ff 0x15600ff 0x15700ff 0x15801ff \
0x15900ff 0x15a00ff 0x15b000f" > /sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070/raw/hex_adwe

Reading this node outputs current register data in the same format, using masks specified in the Reference Manual.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat raw/hex_adwe
0x6001d 0x1b7080 0x1c0bff 0x1d08ff 0x1ea0ff 0x1fc0ff 0x20e3ff 0x21e3ff
0x22c0ff 0x2397ff 0x24011f 0x25041f 0x26041f 0x27061f 0x281fff 0x29427f
0x2a243f 0x2dc5ff 0x2e01ff 0x2f143f 0x3038ff 0x3180ff 0x32c4ff 0x3307ff
0x3414ff 0x3500ff 0x3653ff 0x3700ff 0x3800ff 0x3900ff 0x3a00ff 0x3b01ff
0x3c00ff 0x3d00ff 0x3e003f 0x3f10ff 0x4000ff 0x4100ff 0x4200ff 0x4300ff
0x4400ff 0x4500ff 0x4600ff 0x4700ff 0x4800ff 0x49003f 0x4a10ff 0x4b00ff
0x4c00ff 0x4d00ff 0x4e00ff 0x4f00ff 0x5000ff 0x5100ff 0x5200ff 0x5300ff
0x54003f 0x5514ff 0x5680ff 0x5706ff 0x5800ff 0x5900ff 0x5a00ff 0x5b00ff
0x5c01ff 0x5d00ff 0x5e00ff 0x5f003f 0x6100ff 0x6231ff 0x6300ff 0x6400ff
0x6500ff 0x6600ff 0x6701ff 0x6800ff 0x6900ff 0x6a80bf 0x6b00ff 0x6c00ff
0x6d00ff 0x6e00ff 0x6f00ff 0x7000ff 0x7100ff 0x7200ff 0x7300ff 0x7480ff
0x7500ff 0x7600ff 0x7700ff 0x7800ff 0x7900ff 0x7a00ff 0x7b00ff 0x7c00ff
0x7d00ff 0x7e00ff 0x7f00ff 0x8000ff 0x81000f 0x82000f 0x8300ff 0x8400ff
0x8500ff 0x8600ff 0x8700ff 0x8800ff 0x8900ff 0x8a00ff 0x8b00ff 0x8c00ff
0x8d00ff 0x8e00ff 0x8f00ff 0x9000ff 0x9800ff 0x9900ff 0x9a00ff 0x9b00ff
0x9c00ff 0x9d00ff 0x9e000f 0x9f000f 0xa000ff 0xa100ff 0xa200ff 0xa300ff
0xa400ff 0xa500ff 0xa600ff 0xa700ff 0xa800ff 0xa900ff 0xaa00ff 0xab00ff
0xac00ff 0xad00ff 0xae00ff 0xaf00ff 0xb000ff 0xb100ff 0xb200ff 0xb300ff
0xb400ff 0xb5000f 0xb600ff 0xb700ff 0xb800ff 0xb900ff 0xba00ff 0xbb00ff
0xbc00ff 0xbd00ff 0xbe00ff 0xbf00ff 0xc000ff 0xc100ff 0xc200ff 0xc300ff
0xc400ff 0xc500ff 0xc600ff 0xc700ff 0xc800ff 0xc900ff 0xca00ff 0xcb000f
0xcc00ff 0xcd00ff 0xce00ff 0xcf00ff 0xd000ff 0xd100ff 0xd200ff 0xd300ff
0xd400ff 0xd500ff 0xd600ff 0xd700ff 0xd800ff 0xd900ff 0xf20002 0x11f01ff
0x12000ff 0x12100ff 0x12200ff 0x12300ff 0x12470ff 0x12507ff 0x1266cff 0x12700ff
0x12885ff 0x12900ff 0x12a04ff 0x12b000f 0x12f00ff 0x13000ff 0x13101ff 0x13200ff
0x13300ff 0x13490ff 0x13531ff 0x13600ff 0x13700ff 0x13801ff 0x13900ff 0x13a00ff
0x13b000f 0x13f00ff 0x14000ff 0x14101ff 0x14200ff 0x14300ff 0x14490ff 0x14531ff
0x14600ff 0x14700ff 0x14801ff 0x14900ff 0x14a00ff 0x14b000f 0x14f01ff 0x15000ff
0x15100ff 0x15200ff 0x15300ff 0x15460ff 0x1554aff 0x15620ff 0x15700ff 0x15835ff
0x1591bff 0x15a00ff 0x15b000f

raw/invalidate_cache

The driver caches the register data except for the volatile registers (like status register) to reduce number of i2c data sent to and received from the device. For debugging purposes (maybe some of the registers can change that are not specified as being volatile in the driver), there is an explicit command to invalidate the current cache and force driver to read actual device registers next time.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > raw/invalidate_cache

Driver support dynamic debug, it can be activated with teh following command:

echo "file si5338.c +flmpt" > /sys/kernel/debug/dynamic_debug/control
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