Difference between revisions of "Talk:PHP Examples"
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elphel_fpga_write(4,4) ; /// Acquire single frame to video buffer | elphel_fpga_write(4,4) ; /// Acquire single frame to video buffer | ||
I didn't find any documentation about that. | I didn't find any documentation about that. | ||
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This is writing 4 into the FPGA register 4. Normally when camera is programmed by the driver "5" is written to that location and each frame generated by the sensor gets processed (it goes through "gamma" table first in 8 bit mode or bypasses it in 16 bit mode), then through histogram calculation (used by autoexposure) and then is written to the video RAM (accessible as /dev/fsdram). If compressor is enabled, it senses data in video RAM and loads it back in FPGA as 16x16 pixel tiles (actually - 20x20, overlapping). | This is writing 4 into the FPGA register 4. Normally when camera is programmed by the driver "5" is written to that location and each frame generated by the sensor gets processed (it goes through "gamma" table first in 8 bit mode or bypasses it in 16 bit mode), then through histogram calculation (used by autoexposure) and then is written to the video RAM (accessible as /dev/fsdram). If compressor is enabled, it senses data in video RAM and loads it back in FPGA as 16x16 pixel tiles (actually - 20x20, overlapping). | ||
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[http://elphel.cvs.sourceforge.net/elphel/elphel353-7.1/fpga/x3x3/sensorpix353.v?view=markup Verilog source] | [http://elphel.cvs.sourceforge.net/elphel/elphel353-7.1/fpga/x3x3/sensorpix353.v?view=markup Verilog source] | ||
| + | --[[User:Andrey.filippov|Andrey.filippov]] 02:23, 23 August 2008 (CDT) | ||
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Latest revision as of 23:23, 22 August 2008
What does this function do?
elphel_fpga_write(4,4) ; /// Acquire single frame to video buffer
I didn't find any documentation about that.
This is writing 4 into the FPGA register 4. Normally when camera is programmed by the driver "5" is written to that location and each frame generated by the sensor gets processed (it goes through "gamma" table first in 8 bit mode or bypasses it in 16 bit mode), then through histogram calculation (used by autoexposure) and then is written to the video RAM (accessible as /dev/fsdram). If compressor is enabled, it senses data in video RAM and loads it back in FPGA as 16x16 pixel tiles (actually - 20x20, overlapping).
When raw image is requested -- either 8-bit per pixel, with "gamma" applied or 16 (actually 15 as MSB is always 0, other sensor bits are aligned to bit 14, so 12-bit sensor data is <<3, 10-bit - <<5 ) data is read from the video RAM bypassing the compressor and the circbuf circular buffer (compressor is still used to determine when frame is ready). In this mode acquisition has to be stopped, otherwise the data in the video RAM will be overwritten by the next frames while being read out. Writing "4" to that FPGA register does exactly that - allows one frame to go trough and disables the channel (autoexposure will not work).
Here are links to the source code:
246 #define X313_WA_TRIG 4 // Sensor triggering 247 // 31-3: not used 248 // 2: Enable sensor (0 - abort at once) 249 // 1: External Trigger (0 - internal) 250 // 0: continuous acquisition (0 - single "frame" - actually number of lines specified)
Verilog source --Andrey.filippov 02:23, 23 August 2008 (CDT)
