Difference between revisions of "Ezynq"
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==Supported boards== | ==Supported boards== | ||
* [http://microzed.org Avnet MicroZed] - Zynq 7Z010 | * [http://microzed.org Avnet MicroZed] - Zynq 7Z010 | ||
+ | * [http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Xilinx ZC706] - Zynq 7Z045 | ||
+ | * [http://www.zedboard.org/ Digilent/Avnet ZedBoard] - Zynq 7Z020 (not tested) | ||
+ | * [http://blog.elphel.com/2013/11/nc393-development-progress-testing-the-hardware/ Elphel 10393] - Zynq 7Z030 | ||
==Output== | ==Output== | ||
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<font size='2'> | <font size='2'> | ||
cd u-boot-xlnx | cd u-boot-xlnx | ||
− | ./makeuboot | + | ./makeuboot {target} |
− | + | ||
+ | Supported {targets}: | ||
+ | ./makeuboot zynq_microzed_config | ||
+ | ./makeuboot zynq_zc706_config | ||
+ | ./makeuboot elphel393_config | ||
+ | ./makeuboot zynq_zed_config | ||
* The generated files are: | * The generated files are: | ||
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</font> | </font> | ||
* Bitstream loading is not tested, current code does not enable level shifters - it may be more appropriate to do just before loading of the bitstream. | * Bitstream loading is not tested, current code does not enable level shifters - it may be more appropriate to do just before loading of the bitstream. | ||
+ | * Write level training for DDR memory doesn't work in MicroZed and ZC706 |
Revision as of 09:39, 5 November 2013
Contents
Decription
Ezynq project is started to create a bootloader for systems based on the Xilinx Zynq SoC without the inconvenience of the non-free tools and/or files. The goal is not just to "free" the code, but to provide users with the higher degree of flexibility in fine-tuning of the configuration parameters.
Supported boards
- Avnet MicroZed - Zynq 7Z010
- Xilinx ZC706 - Zynq 7Z045
- Digilent/Avnet ZedBoard - Zynq 7Z020 (not tested)
- Elphel 10393 - Zynq 7Z030
Output
- boot.bin (fsbl is not required to boot)
Install meta-toolchain (Ubuntu 13.04)
sudo apt-get install texinfo chrpath git clone -b dylan git://git.yoctoproject.org/poky cd poky . ./oe-init-build-env bitbake meta-toolchain
- Run installation script in build/tmp/deploy/
Install ezynq (Ubuntu 13.04)
git clone git://git.code.sf.net/p/elphel/ezynq ezynq cd ezynq ./install_uboot.sh
Generate boot.bin
- Edit initenv according to the built meta-toolchain
cd u-boot-xlnx ./makeuboot {target}
Supported {targets}:
./makeuboot zynq_microzed_config ./makeuboot zynq_zc706_config ./makeuboot elphel393_config ./makeuboot zynq_zed_config
- The generated files are:
- boot.bin - the bootloader image
- u-boot.html - configuration settings overview
- u-boot.map - the bootloader's memory map
- u-boot - ELF file
Develop (add boards support)
- Add a new board record to the list in the boards.cfg (or leave as is if the item already exists).
- Create a configuration file for the new board - use include/configs/zynq_microzed.h as a reference
- Edit (or create new for specific memory and chip) according to the board configuration the following files:
include/configs/ezynq/ezynq_MT41K256M16RE125.h include/configs/ezynq/ezynq_XC7Z010_1CLG400.h include/configs/ezynq/zed_ezynq.h
./makeuboot
IMPORTANT: Only 192KB of zynq's series on-chip memory are available at boot. It is the maximal size of u-boot.bin (not the final boot.bin) - the python script will throw just a warning.
Known issues
- [FIXED] (in Linux) USB does not work yet.
- [FIXED] (in Linux) Ethernet is not tested (on the board we have it does not work with provided images, so we suspect a hardware problem. If no network:
ifconfig eth0 down ifconfig eth0 up
- Bitstream loading is not tested, current code does not enable level shifters - it may be more appropriate to do just before loading of the bitstream.
- Write level training for DDR memory doesn't work in MicroZed and ZC706