Difference between revisions of "Ezynq"
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==Decription== | ==Decription== | ||
| − | [https:// | + | [https://github.com/Elphel/ezynq Ezynq] project is started to create a bootloader for systems based on the Xilinx Zynq SoC without the inconvenience of the non-free tools and/or files. The goal is not just to "free" the code, but to provide users with the higher degree of flexibility in fine-tuning of the configuration parameters. |
====="Free" the code part===== | ====="Free" the code part===== | ||
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* FSBL is under Xilinx's copyright | * FSBL is under Xilinx's copyright | ||
* The current (2014/02/23) official SPL implementation in the [https://github.com/Xilinx/u-boot-xlnx/tree/master-next u-boot-xlnx master-next 54fee227ef141214141a226efd17ae0516deaf32] branch is FSBL-less but it requires to use the files (<b>ps7_init.c/h</b>) that come under Xilinx's copyright which makes u-boot noncompliant with its GPL license. | * The current (2014/02/23) official SPL implementation in the [https://github.com/Xilinx/u-boot-xlnx/tree/master-next u-boot-xlnx master-next 54fee227ef141214141a226efd17ae0516deaf32] branch is FSBL-less but it requires to use the files (<b>ps7_init.c/h</b>) that come under Xilinx's copyright which makes u-boot noncompliant with its GPL license. | ||
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==Supported boards== | ==Supported boards== | ||
Revision as of 21:35, 16 September 2015
Contents
Decription
Ezynq project is started to create a bootloader for systems based on the Xilinx Zynq SoC without the inconvenience of the non-free tools and/or files. The goal is not just to "free" the code, but to provide users with the higher degree of flexibility in fine-tuning of the configuration parameters.
"Free" the code part
Ezynq addresses the potential legal problems with distribution of a product/software based on Zynq platform:
- FSBL is under Xilinx's copyright
- The current (2014/02/23) official SPL implementation in the u-boot-xlnx master-next 54fee227ef141214141a226efd17ae0516deaf32 branch is FSBL-less but it requires to use the files (ps7_init.c/h) that come under Xilinx's copyright which makes u-boot noncompliant with its GPL license.
Supported boards
| Board | Chip | Manufacturer | Tested? |
|---|---|---|---|
| MicroZed | Zynq 7Z010 | Avnet | Y |
| ZC706 | Zynq 7Z045 | Xilinx | Y |
| ZedBoard | Zynq 7Z020 | Digilent/Avnet | Y |
| 10393 | Zynq 7Z030 | Elphel | Y |
Output
- boot.bin (SPL) - loads u-boot.img, no FSBL needed.
- u-boot.img (u-boot image)
Boot: Copy them to SD card in order to boot from it.
Install meta-toolchain (Kubuntu 13.04)
- Build:
sudo apt-get install texinfo chrpath git clone -b dora git://git.yoctoproject.org/poky cd poky . ./oe-init-build-env bitbake meta-toolchain
- Run installation script in build/tmp/deploy/
Install Ezynq (Kubuntu 13.04)
git clone git://git.code.sf.net/p/elphel/ezynq ezynq cd ezynq ./install_uboot.sh
Build
- Edit initenv according to the built meta-toolchain
- Build:
cd u-boot-xlnx ./makeuboot <target>
Supported <targets>:
./makeuboot zynq_microzed_config ./makeuboot zynq_zc706_config ./makeuboot elphel393_config ./makeuboot zynq_zed_config
- The generated files are:
- boot_head.bin - contains values for RBL register initialization
- boot.bin - the SPL image
- u-boot.img - the u-boot image
- u-boot.html - configuration settings overview
- u-boot.map - the bootloader's memory map
- u-boot - ELF file
Develop (add support for new boards)
- Add a new board record to the list in the boards.cfg (or leave as is if the item already exists).
- Create a configuration file for the new board - use include/configs/zynq_microzed.h as a reference
- Edit (or create new for specific memory and chip) according to the board configuration the following files:
include/configs/ezynq/ezynq_MT41K256M16RE125.h include/configs/ezynq/ezynq_XC7Z010_1CLG400.h include/configs/ezynq/zed_ezynq.h
- Build:
./makeuboot <new_board>_config
Known issues
- [FIXED] (in Linux) USB does not work yet.
- [FIXED] (in Linux) Ethernet is not tested (on the board we have it does not work with provided images, so we suspect a hardware problem. If no network:
ifconfig eth0 down ifconfig eth0 up
- Bitstream loading is not tested, current code does not enable level shifters - it may be more appropriate to do just before loading of the bitstream.
- Write level training for DDR memory doesn't work in MicroZed and ZC706
