Difference between revisions of "Microzed issues"
From ElphelWiki
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<b>Possible reason:</b> | <b>Possible reason:</b> | ||
driver | driver | ||
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+ | |||
+ | * U-boot Falcon mode (boot from SPL to OS) | ||
+ | <font size='2'> | ||
+ | <b>Description:</b> | ||
+ | Investigate the option | ||
+ | <b>Possible reason:</b> | ||
+ | |||
</font> | </font> | ||
Revision as of 14:27, 19 February 2016
List
- [SOLVED] UART
Description: UART register contents: timeout=0 rxfifo_level=56, should be timeout=10 rxfifo_level=56 minicom prints 56 symbols at a time when rxfifo reaches its level. remembers all typed symbols sometimes the timeout register is set correctly Possible reason: In driver .startup and .termios conflict? Racing Resets or reset takes time? Solution: Added a delay after reset - some other functions in the driver also have it - some not. Luck? Patch: diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index f214c7f..164e32d 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -704,6 +704,9 @@ static void cdns_uart_set_termios(struct uart_port *port, ctrl_reg |= CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST; cdns_uart_writel(ctrl_reg, CDNS_UART_CR_OFFSET); + while (cdns_uart_readl(CDNS_UART_CR_OFFSET) & + (CDNS_UART_CR_TXRST | CDNS_UART_CR_RXRST)) + cpu_relax(); /* * Clear the RX disable and TX disable bits and then set the TX enable * bit and RX enable bit to enable the transmitter and receiver. Links: * https://forums.xilinx.com/t5/Zynq-All-Programmable-SoC/Zynq-Uart-timeout-problem/td-p/432016 * http://www.makelinux.net/ldd3/chp-7-sect-3
- SSH terminal
Description: Freezes, lags but remembers all typed symbols Possible reason: Bad network cable? Network problem?
- RTC
Too many messages when rtc is missing Description: 3x"hwclock: can't open '/dev/misc/rtc': No such file or directory" in boot log Possible reason: driver
- U-boot Falcon mode (boot from SPL to OS)
Description: Investigate the option Possible reason: