Si5338 driver

The drivers/misc/si5338.c driver allows real-time control of the Silicon Labs si5338 Clock Generator using Linux sysfs interface. It also allows setting up parameters using the Device Tree.

It is also possible to use the register map file generated by Silicon Labs software, converted by a Python script to a Device Tree fragment (or fed to the driver using sysfs interface).

Reference Documentation

This driver is developed using very good and detailed documentation provided by the chip manufacturer: [1] - detailed description of the device registers [2] - overall chip documentation including configuration procedure

sysfs interface

top level files

outputs (read only)

Provides information about each of the 4 outputs, like in the example below:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_LVPECL, output frequency: 0 Hz, output route: No clock, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz

This includes:

• output voltage (1V5 - 1.5V)
• standard (HSTL)
• output inversion for of the 2 paired outputs in single-ended mode ("A+B-" A positive, B - inverted; "A+" - output B is disabled)
• output frequency
• output route - each output can be fed from multiple sources, for example "IN3:2:8" means signal from input 3 divided by 2 in the input stage and by 8 in the output stage. "MS0:1" means that output is connected to the MultiSynth output 0 with no divider
• disable state - low, high, hi-z or always on - state of the output pin when it is disabled
• output stage (and divider) power up/down state
• output enable/disable state (all outputs can be independently disabled by the global output disable)
• spread spectrum: on/off state, amplitude (in 0.01% of the output frequency steps) and the sweep rate. Only down spread is supported, so the center frequency is half-amplitude less than with spread spectrum disabled

status (read only)

Read and interpret status register.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat status
0x8 input clock: OK, feedback clock: LOST, PLL lock: OK, calibration: DONE

pre_init (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init

Disables all outputs, loss of lock signal before setting parameters and initializing PLL

pre_init_clear (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > pre_init_clear

Same as pre_init, but additionally clears all output routes and input multiplexers before setting up the needed ones

post_init (write only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > post_init

Initializes and calibrates PLL - should be called after the PLL parameters (or the whole frequency plan) are set up.

input/ folder

input/in_frequency56

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "25000000" > input/in_frequency3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_frequency3
25000000

Set the input frequency applied to one of the differential input pairs (12, 56) or single-ended (3,4). "in_frequency12xo: is used to specify the frequency of the crystal connected between inputs 1 and 2. While the driver tries to make as little assumptions as possible and reads data from the si5338 registers (or actually from their cached shadows), the input frequency has to be stored off-chip and may be needed to be set up if you plan to use high-level functions to change frequency parameters even if the registers where initialized from the pre-calculated register map. Each write to these nodes also programs the input multiplexers and routes the specified pin (pin pair) to the PLL reference input, so if there are several active inputs, the last specified input will be routed.

input/ref_mux

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" input/in_mux
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux
1

Directly control in input and feedback multiplexers

input/ref_mux_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_mux_txt 
IN3(single ended)

Interpret the state of the input and feedback multiplexers

input/in_p2_div

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "32" > input/in_p1_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_p1_div
32

Read/write input dividers, valid values are 1,2,4,8,16 and 32

input/in_pfd_fb

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/in_pfd_ref
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref
0

Read/write PLL reference and feedback multiplexers selections. The feedback input can be switched to the output of the feedback multiplexer from the MSn MultiSynth output with the "input/fb_external".

input/in_pfd_fb_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/in_pfd_ref_txt
p1div_in(refclk)

Read and interpret the state of the reference and feedback multiplexers.

input/fb_external

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > input/fb_external
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/fb_external
0

Switch between internal PLL feedback from the MSn divider (0) and the external input (1). The external feedback can be used in the zero-delay buffer mode, most applications use internal feedback mode.

input/xtal_freq_txt (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/xtal_freq_txt
26MHz..30Mhz

Read crystal oscillator mode settings. Appropriate settings are selected by writing to "input/in_frequency12xo" or loading the register map prepared by the Silicon Labs software.

input/pll_fb_frequency (read only)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_ref_frequency
25000000
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat input/pll_fb_frequency
0

Read reference and feedback frequency values. Determined by the input frequency settings, dividers and multiplexers.

pll/ folder

VCO frequency (use in PLL) can be set up either directly, or to match specified output frequency (one of the 4 channels). The valid range is 2.2GHz to 2.84GHz (2200000000 to 2840000000). Frequencies are specified in Hz with possible fractional part (numerator then denominator), so "2550000000 0 1" is the same as just "2550000000". In both cases "_int" and "_fract" applies to the feedback divider, the lowest jitter is achieved with integer dividers. Reading any of these nodes return the PLL frequency in Hz. "pll/pll_freq_int" is the most common option to use.

pll/pll_freq_int

Specify VCO frequency in HZ, require integer divider. Read VCO frequency in Hz.

pll/pll_freq_fract

Specify VCO frequency in HZ, allow fractional divider. Read VCO frequency in Hz.

pll/pll_by_out_int

Match VCO frequency to the required output frequency in HZ, require integer divider in both feedback and output dividers. Read VCO frequency in Hz.

pll/pll_by_out_fract

Match VCO frequency to the required output frequency in HZ, allow fractional feedback (MSn) divider. Read VCO frequency in Hz.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat pll/pll_by_out_int
2550000000 0 1

multiSynth/ folder

The si5338 chip uses 5 "multiSynth" fractional dividers - 4 of them (MS0..MS3) are used for the output frequencies generations, and the fifth one (MSn) is used as the PLL feeback divider. This subdirectory allows low-level control of these dividers - in most cases they can be set up indirectly by specifying the required frequencies.

multiSynth/msn_p123

Read/write a set of 3 registers as defined in the Reference Manual (P1, P2 and P3):

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "21248 0 1" multiSynth/ms0_p123
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_p123
21248 0 1

multiSynth/msn_abc

Read/write MultiSynth dividers using integer part, numerator and denominator (a,b and c) as referenced in the manual

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_abc
170 0 1

multiSynth/ms3_freq_fract

Setting integer/fractional MultiSynth dividers by the required output frequency (single integer or 3 numbers - integer, numerator and denominator). Reading back provides actual value of the frequency.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms0_freq_int
15000000 0 1

multiSynth/ms_power_up

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0 3" > multiSynth/ms_power_up
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_up
0 3

Power up selected channels, read returns the list of the powered up channels

multiSynth/ms_power_down

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > multiSynth/ms_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat multiSynth/ms_power_down
1 2

Power down selected channels, read returns the list of the powered down channels

multiSynth/ms_reset

Reset multiSynth dividers (not clear when exactly they should be reset - possibly after spread spectrum changes).

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" > multiSynth/ms_reset

output_clocks/ folder

output_clocks/out3_div

Direct setting of the output divider, that can be 1,2,4,8,16 and 32. In most applications this divider is automatically set by specifying the output frequency.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "8" > output_clocks/out0_div
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_div
8

output_clocks/out3_div_by_freq (write only)

Set just the divider to match the required frequency. Frequency is specified in Hz.

output_clocks/out3_source

Set/read the output multiplexer selection (as a number).

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "6" > output_clocks/out0_source
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source
6

output_clocks/out3_source_txt (read only)

Read and interpret the output multiplexer selection.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_txt
MS0

output_clocks/out3_source_freq (read only)

Get the frequency on the input of the output divider.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_source_freq 
15000000 0 1

output_clocks/out3_route

Read/write the full route of the output clock, including the divider. Here are some examples:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "IN3:2:8" >output_clocks/out1_route

Route clock from input 3 through input divider 2 and output divider 8

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out2_route
No clock

Output 2 is not connected to any source

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_clocks/out0_route
MS0:1

Output 0 is connected to MultiSynth divider channel 0, output divider 1:1

output_clocks/out3_freq_fract

Most common way to specify output frequency and route. Output is routed to the same channel MultiSynth divider, MS divider and output divider are set to match the specified frequency. "_int" suffix rounds the MS divider to the nearest integer, "_fract" allows fractional dividers. Output frequency specified in Hz as a single number or a triad of integer, numerator and denominator. When read returns the actual frequency of the output

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "150000 1 2" > output_clocks/out2_freq_fract
sh: write error: Invalid argument

Specified frequency (150KHz) is too low even with the 1:32 output divider

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_fract
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_freq_fract
200000 6250 12207
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "200000 1 2" > output_clocks/out2_freq_int
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_freq_int
200219 169 199
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat  output_clocks/out2_route
MS2:32
Output frequency for the channel 2 is set to the 200000.5 Hz first with fractional MS2 divider (resulting in 200000.512Hz), then with integer divider - 200219.8 Hz

spread_spectrum/ folder

Driver only supports down spread implemented in all chip revisions (si5338B does not have center spread), so the nominal frequency should be set half-amplitude higher than the the center frequency.

spread_spectrum/ss3_regs_hex

Spread spectrum parameters for the specified MultiSynth channel as a set of the 7 values as specified in the Reference Manual :

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_regs_hex 
updown_par=0x77 down_pars=0x0 0x20 0xcfd up_pars= 0x100 0x1 0x0

when set up, provide the list in the same sequence (may have less than 7, then only specified values will be updated): up/down parameter, down parameter 1, down parameter 2, down parameter 3, up parameter 1, up parameter 2, up parameter 3.

spread_spectrum/ss3_values

Per-channel spread spectrum values: On/Off state, spread amplitude as integer in the range of 10..500 (corresponding to 0.1% to 5% in 0.01% steps) and sweep rate in Hz (from 31500 to 63000)

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 500 31500" > spread_spectrum/ss0_values
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss0_values
Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz

spread_spectrum/ss_change_freq_mode

Spread spectrum registers need to be re-calculated after base frequency change, this parameter specifies what to do when the MultiSynth divider is modified.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "0" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
0 - turn spread spectrum off on frequency change
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
1 - recalculate spread spectrum on frequency change, do not reset MS
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
2 - turn spread spectrum off on frequency change, reset MS when SS is turned on
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "3" >  spread_spectrum/ss_change_freq_mode
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat spread_spectrum/ss_change_freq_mode
3 - recalculate spread spectrum on frequency change, do not reset MS

spread_spectrum/ms_reset (write only)

Force MultiSynth reset (not sure if it is needed and when)

output_drivers/ folder

Configuring output drivers - voltage, I/O standard, inversion, power up/down, output enable and state when the output is disabled

output_drivers/3V3_SSTL_B-

Set voltage, standard and inversion of the paired outputs (A,B) where applicable by writing list of channels to one of the nodes. When read, node returns the list of outputs that have the specified parameters:

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" > output_drivers/2V5_SSTL_A+B+
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/2V5_SSTL_A+B+
1 2

To find out the standard of the particular output (or all of them) it is possible to read output_drivers/output<n> or just "outputs". Not all of the combinations of the low-level register values correspond to one of the valid output driver configuration listed above, these combinations will be listed as "Invalid output configuration" and provide the values of the relevant register fields, described in the Reference Manual.

output_drivers/dis_low

Setting (and reading back) the behavior of the outputs in the disabled state. Note output state is synchronous and requires clock to run, so if output is already in disable state, switching form "dis_low" to "dis_high" will not take effect. Switching "dis_low" -> "dis_always_on" -> "dis_high" works, as "dis_always_on" temporarily provides output clock.

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z 
 0 1 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "1 2" >output_drivers/dis_low
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/dis_hi-z 
 0 3

output_drivers/output_en

Enables/disables specified channels, reads back the list of enabled/disabled ones

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_en
 0 1 2 3

output_drivers/output_power_down

Turns on/off power to the output driver and divider, reads back the list of powered up/down output channels

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
 0 2 3
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# echo "2 3" > output_drivers/output_power_down
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output_power_up
 0

output_drivers/outputs (read only)

List settings related to individual output channel or all of them (the last node is duplicated on the top hierarchy level):

root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/output0
1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
root@elphel393:/sys/devices/amba.0/e0004000.ps7-i2c/i2c-0/0-0070# cat output_drivers/outputs
0: 1V5_HSTL_A+, output frequency: 15000000 Hz, output route: MS0:1, ms_power_up, disabled state: dis_hi-z, output_power_up, output_en, Spread spectrum is ON, down amplitude= 500 ( *0.01%), spread rate= 31500 Hz
1: 2V5_SSTL_A+B+, output frequency: 1562500 Hz, output route: IN3:2:8, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
2: 2V5_SSTL_A+B+, output frequency: 200219-169/199 Hz, output route: MS2:32, ms_power_up, disabled state: dis_low, output_power_down, output_en, Spread spectrum is OFF, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz
3: 1V8_LVDS, output frequency: 150000000 Hz, output route: MS3:1, ms_power_up, disabled state: dis_hi-z, output_power_down, output_en, Spread spectrum is ON, down amplitude= 50 ( *0.01%), spread rate= 31500 Hz

raw/ folder

Nodes in this directory provide low-level access to the chip registers, allow loading of the complete register map generated by the Silicon Labs ClockBuilder software as well as to generate the loadable register map from the current state of the chip.

raw/hex_address

Address of the register to read/write data form, this is a full 9-bit register of the si5338 (not the 8-bit i2c register address), the page switching is handled by the driver. Silicon Labs documentation references registers by decimal address, this is why both hex and decimal versions are implemented