Difference between revisions of "10359 FPGA Simulation"
From ElphelWiki
Okdzhimiev (talk | contribs) |
Okdzhimiev (talk | contribs) |
||
| Line 2: | Line 2: | ||
==Verification== | ==Verification== | ||
| − | 1. | + | 1. Channel 3 simulation: |
| − | * DDR initialization through i2c - done | + | * DDR initialization through i2c - done. |
| − | * write to DDR - done | + | * write to DDR - done. |
| − | * read from DDR - done | + | * read from DDR - done. |
==Board tests== | ==Board tests== | ||
| − | 1. | + | 1. Check BRAM read/write. |
| − | 2. | + | 2. Check DDR read/write. |
Revision as of 17:57, 13 February 2008
The main page for the board is 10359.
Verification
1. Channel 3 simulation:
- DDR initialization through i2c - done.
- write to DDR - done.
- read from DDR - done.
Board tests
1. Check BRAM read/write. 2. Check DDR read/write.
