Difference between revisions of "Load custom bitstream"
From ElphelWiki
| Line 5: | Line 5: | ||
** voltages are set by the software through i2c | ** voltages are set by the software through i2c | ||
| − | Bitstreams paths | + | ==Bitstreams paths== |
* ''/usr/local/verilog/'' | * ''/usr/local/verilog/'' | ||
| + | {| class='wikitable' | ||
| + | ! name | ||
| + | ! description | ||
| + | |- | ||
| + | |x393_parallel.bit | ||
| + | |for 5MPix sensor with parallel interface + SATA | ||
| + | |- | ||
| + | |x393_hispi.bit | ||
| + | |for 14MPix sensor with serial interface + SATA | ||
| + | |- | ||
| + | |x393_sata.bit | ||
| + | |SATA only | ||
| + | |- | ||
| + | |x359.bit | ||
| + | |for external MUX 3-1 board | ||
| + | |} | ||
| − | Init | + | ==Init== |
* /etc/init.d/init_elphel393 | * /etc/init.d/init_elphel393 | ||
... | ... | ||
Revision as of 14:07, 20 April 2017
Description
The default bitstream is loaded from OS not from u-boot. Reasons:
- Different banks have different (software - controlled and regulated) voltages and they need to be set up before loading.
- voltages are set by the software through i2c
Bitstreams paths
- /usr/local/verilog/
| name | description |
|---|---|
| x393_parallel.bit | for 5MPix sensor with parallel interface + SATA |
| x393_hispi.bit | for 14MPix sensor with serial interface + SATA |
| x393_sata.bit | SATA only |
| x359.bit | for external MUX 3-1 board |
Init
- /etc/init.d/init_elphel393
...
$CONFDIR/init_elphel393.py "{\"usb_hub\":1, \"ip\":1,\"imgsrv\":1, \"autoexp_daemon\":1, \"autocampars\":1, \"sata\":1, \"gps\":1, \"eyesis\":0 }"
...
- in this line the extra init procedures are listed, to disable/skip certain procedure set 0, to enable - set 1
- everything is done in /etc/elphel393/init_elphel393.py which runs other scripts.
- the bitstream is loaded by autocampars or sata (if autocampars is skipped)
