Mcontr

From ElphelWiki
Revision as of 01:24, 11 August 2008 by Oleg (talk | contribs)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Description

FPGA module that controls reads and writes between FPGA and DDR SDRAM (boards 10353 & 10359).

TODO

  • bank interleaving
  • run-time programmable SDRAM sequencing
Retrieved from "https://wiki.elphel.com/index.php?title=Mcontr&oldid=5064"