Difference between revisions of "Adjusting sensor clock phase"
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| − | Elphel cameras are designed so they can support multiple different sensor, including those that were not available when the particular camera model was first released | + | Elphel cameras are designed so they can support multiple different sensor, including those that were not available when the particular camera model was first released. That is possible, because the camera functionality is split into the sensor-independent computer (see [[10353]]) and the sensor front end. This board is very simple for the CMOS images sensors, like [[10338]] - basically it includes just the image sensor itself, connector for the cable to the camera main board and the power conditioning circuitry. In other cameras (like Model 363) the high resolution CCD-based sensor front end is much more complex ([[10347]]+[[10342]]), but they all interface the main board through the 30-conductor flex cable that on the [[10353]] side is connected directly to the FPGA pins (all but power supply/ ground pins). That makes the interface universal, as functions of the FPGA pins can be changed with just a new code, no hardware changes are needed. |
Revision as of 22:08, 16 October 2007
Elphel cameras are designed so they can support multiple different sensor, including those that were not available when the particular camera model was first released. That is possible, because the camera functionality is split into the sensor-independent computer (see 10353) and the sensor front end. This board is very simple for the CMOS images sensors, like 10338 - basically it includes just the image sensor itself, connector for the cable to the camera main board and the power conditioning circuitry. In other cameras (like Model 363) the high resolution CCD-based sensor front end is much more complex (10347+10342), but they all interface the main board through the 30-conductor flex cable that on the 10353 side is connected directly to the FPGA pins (all but power supply/ ground pins). That makes the interface universal, as functions of the FPGA pins can be changed with just a new code, no hardware changes are needed.
