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<div style="display:inline; color:blue">'''''Elphel Network Cameras Manual'''''</div> | <div style="display:inline; color:blue">'''''Elphel Network Cameras Manual'''''</div> | ||
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[[Using the cameras]] | | [[Using the cameras]] |[[Camera software]] |[[Camera hardware]] |[[Diagnostic and repair]] |<div style="display:inline; color:green">Development documentation</div> |[[Information]] |[[Glossary]] |[[About Elphel, Inc]] | ||
[[Camera software]] | | |||
[[Camera hardware]] | | |||
[[Diagnostic and repair]] | | |||
[[Information]] | | |||
[[Glossary]] | | |||
[[About Elphel, Inc | |||
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== Introduction == | |||
===2 Developers:=== | ===2 Developers:=== | ||
| Line 26: | Line 14: | ||
Andrey | Andrey | ||
== Photo-finish == | |||
== Zeroconf for Elphel cameras == | |||
== Elphel cameras and Zoneminder == | |||
== USB host interface == | |||
== Motorized lens control == | |||
== Outdoor enclosure == | |||
== Real Time Clock for the camera == | |||
There is a description of [[RTC]] implemented in the camera FPGA. This clock might be fine-tuned, the data is available for reading by the CPU and to be embedded in the camera images/video by the FPGA itself. | There is a description of [[RTC]] implemented in the camera FPGA. This clock might be fine-tuned, the data is available for reading by the CPU and to be embedded in the camera images/video by the FPGA itself. | ||
Revision as of 09:29, 24 September 2005
Elphel Network Cameras Manual
Using the cameras |Camera software |Camera hardware |Diagnostic and repair |
Development documentation
|Information |Glossary |About Elphel, Inc
Introduction
2 Developers:
We just started this Wiki so the info here is rather patchy covering just some particular topics. Please be sure more will be posted here by us - Elphel develpers and (I hope) by you too.
Happy hacking of Elphel products,
Andrey
Photo-finish
Zeroconf for Elphel cameras
Elphel cameras and Zoneminder
USB host interface
Motorized lens control
Outdoor enclosure
Real Time Clock for the camera
There is a description of RTC implemented in the camera FPGA. This clock might be fine-tuned, the data is available for reading by the CPU and to be embedded in the camera images/video by the FPGA itself.
Free Software and Open Hardware. Elphel, Inc., 2005