x393 is a project for the FPGA (Xilinx Zynq 7030) that powers Elphel NC393 camera.
The project uses Verilog HDL, it is distributed as a project of VDT plugin for Eclipse IDE. When VDT plugin (and related software) is installed you may launch simulation and implementation tools from this IDE.
Simulation uses Icarus Verilog simulator and Cocotb Python co-simulator (Cocotb still uses Icarus).
Proprietary Implementations tools (x393 project uses only free for download WebPack edition of Xilinx Vivado tools) may be installed on the same computer as the development environment, or on a separate computer - in that case VDP plugin uses ssh+rsync to communicate with teh installed software. Such separation allows to comply with Xilinx WebPack license that requires that computer with Vivado WebPack installation should be connected to the Internet, and at the same time preserve security of the files on your workstation - communication between the two computers is one-way and Vivado can not reach files on the workstation.
VDT plugin does not use Vivado GUI, in the case of x393 it only uses Vivado synthesis and implementation command line tools. Other projects (x353) for older FPGA devices use Xiinx ISE, it is possible to use Intel/Altera Quartus also.
Simulation with Cocotb
Simulation with cocotb uses client-server model.
First you launch Cocotb simulation (double-click on 'Cocotb Python Verification' menu item in the bottom-right panel of VDT perspective. This should launch simulation, and after all the initialization steps are done, simulation will be suspended, waiting for the client to communicate (Figure 1).
Client is a Python application that may run either in the physical camera, or on a GNU/Linux computer. In that case all hardware-dependent functionality (access to the memory or FPGA registers) is replaced by the interaction with Cocotb simulation (see this blog post )
Examples of the commands to launch in the client program are available like comment sin the end of the file  and can be copy-pasted from there. Program is ran from the top directory of the cloned x393 project:
./py393/test_mcntrl.py @py393/cocoargs --simulated=localhost:7777
Next lines are the actual commands to be executed, starting with the DDR memory initialization. The whole command block can be copy-pasted simultaneously, and they will start running - that may take a long times (from tens to hundreds of minutes with small but actual image acquisition and compression on all ports). As soon as the client will start, Cocotb simulation in VDT should come to life again and output executed commands.
Console output for the client will look like:
eyesis@eyesis-SH87R: eyesis@eyesis-SH87R:~/git/x393$ ./py393/test_mcntrl.py @py393/cocoargs --simulated=localhost:7777 args.simulated = localhost:7777 args = Namespace(commands=, defines=' TARGET_MODE=1', exceptions=0, interactive=True, localparams=' includes/x393_cur_params_target_gen.vh', parameters=' PICKLE="includes/x393_mcntrl.pickle"', paths=[[' system_defines.vh'], [' includes/x393_parameters.vh includes/x393_cur_params_simulation.vh includes/x393_localparams.vh includes/x393_simulation_parameters.vh']], simulated='localhost:7777', socket_port=, verbose=None) +++ paths=['system_defines.vh', 'includes/x393_parameters.vh', 'includes/x393_cur_params_simulation.vh', 'includes/x393_localparams.vh', 'includes/x393_simulation_parameters.vh']
[113.368/+113.364] Initialize memory, turn on refresh (used when no calibration is needed) init_ddr3(wait_complete=True, refresh=True, quiet=4, ) [122.141/+8.773] All Done x393 (localhost:7777) +122.141s-->
It is possible to view partially simulated waveforms and then enter more commands. In the simplest case just enter "finish" command and then "exit" - restarting simulation after "finish" is not built in the program.
x393 (localhost:7777) +122.141s--> finish stop-> 0 x393 (localhost:7777) +0.001s--> exit eyesis@eyesis-SH87R:~/git/x393-neon$
"finish" command from the client ends cocotb simulation (Figure 3) and VDT launches GTKWave showing simulation results (Figure 4).